Wednesday, April 17, 2024

AMD Spartan UltraScale+ FPGAs: Cheap, Powerful Edge Option

Features of AMD Spartan UltraScale+ Family

The newest model in AMD’s vast lineup of cost-optimized FPGAs and adaptive SoCs, the AMD Spartan UltraScale+ FPGA family, was unveiled today. Spartan UltraScale+ devices offer the highest I/O to logic cell ratio in FPGAs built in 28nm and lower process technology, deliver up to 30% lower total power consumption versus the previous generational, and contain the most comprehensive set of security features in the AMD Cost-Optimized Portfolio. They provide cost and power-efficient performance for a wide range of I/O-intensive applications at the edge.

Kirk Saban, corporate vice president, Adaptive and Embedded Computing Group, AMD, stated, “For over 25 years the Spartan FPGA family has helped power some of humanity’s finest achievements, from lifesaving automated defibrillators to the CERN particle accelerator pushing the boundaries of human knowledge.” “The Spartan UltraScale+ family, which builds on proven 16nm technology, further strengthens the market-leading FPGA portfolio and underscores the commitment to delivering cost-optimized products for customers with enhanced security and features, common design tools, and long product lifecycles.”

Adaptable I/O Interface and Power-Saving Computing

In order to handle the explosion of sensors and linked devices, Spartan UltraScale+ FPGAs are designed for the edge. They provide high I/O counts and flexible interfaces that enable the FPGAs to easily interface and seamlessly integrate with various devices or systems.

With up to 572 I/Os and voltage support up to 3.3V, the series has the industry’s largest I/O to logic cell ratio of FPGAs developed on 28nm and lower process technology, allowing any-to-any communication for edge sensing and control applications. High I/O density in a very tiny footprint is made possible by the tried-and-true 16nm fabric and support for a wide range of packages, beginning as small as 10x10mm. The broad spectrum of AMD FPGAs offers the scalability to start with FPGAs tailored for cost and proceed to midrange and high-end solutions.

With its 16nm FinFET technology and robust connections, the Spartan UltraScale+ family is predicted to provide up to a thirty percent decrease in power when compared to the 28nm Artix 7 family. These are the first AMD Spartan UltraScale+ FPGAs with PCIe Gen4 x8 compatibility and a hardened LPDDR5 memory controller, giving users future-ready capabilities and power efficiency.

Cutting Edge Security Features

Within the AMD Cost-Optimized FPGA range, Spartan UltraScale+ FPGAs provide the most advanced security features available.

  • IP protection: NIST-approved Post-Quantum Cryptography techniques provide cutting-edge IP defense against constantly changing cyberthreats and assaults. For further protection, every device has a unique fingerprint thanks to a physical unclonable feature.
  • Preventing tampering: Differential power analysis helps defend against side-channel attacks, and PPK/SPK key support helps handle compromised or outdated security keys. A permanent tamper penalty is included into the devices to further guard against abuse.
  • Optimizing uptime: Improved single-event upset performance facilitates quick, safe setup that is more dependable for clients.

The AMD Vivado Design Suite and Vitis Unified Software Platform support the whole AMD portfolio of FPGAs and adaptive SoCs, enabling hardware and software designers to take advantage of the productivity advantages of these tools and included IPs through a single designer cockpit from design to verification.

It is anticipated that sample and evaluation kits for the AMD Spartan UltraScale+ FPGA family would be accessible in the first half of 2025. The AMD Vivado Design Suite will be supported with tools beginning in the fourth quarter of 2024, and documentation is already accessible.

Quicken Time-to-Market with Tried-and-True Design Tools

The AMD Spartan UltraScale+ family, like all other contemporary devices in AMD’s cost-optimized portfolio, is supported by the Vivado Design Suite, a single, user-friendly tool, while the products of other FPGA providers often need the use of numerous tools. When used in conjunction with a comprehensive intellectual property database and machine learning-driven power optimization features, the tool boosts productivity and accelerates time-to-market for designers.

Create Once with a Reliable Vendor

They are pleased to announce the release of the AMD Spartan UltraScale+ family, the newest FPGA in a long line that dates back 40 years. Partnering with AMD gives you the assurance that your designs will stand the test of time. They aim to provide device support for at least 15 years, longer than the industry average. You also receive access to a variety of devices for design scalability, ranging from the mid- and high-end to the cost-optimized the portfolio.

The new AMD Spartan UltraScale+ FPGA family allows you to save costs and power usage while optimizing performance. More significantly, you get long-term partner support and equipment that are appropriate for all of your various demands and applications.

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