Intel is going to improve the capacity of Arrow Lake’s L2 cache

According to Golden Pig Upgrade (via @9550pro), a well-known leaker who frequently has correct information about impending Intel products, Intel aims to expand the L2 capacity of its next CPUs, code-named Arrow Lake, to 3 MB per core. If the data is correct, Arrow Lake CPUs will perform better in applications that depend on memory bandwidth.

With a 2 MB L2 cache each powerful Raptor Cove core and a 512 KB L2 cache per frugal Greacemont core, Intel’s 13th-generation Core ‘Raptor Lake’ processor has a total of 32 MB of L2 cache as well as 36 MB of L3 cache (3 MB L3 cache per P core and 3 MB per four E cores).

The overall L2 capacity for performance cores on Intel’s Arrow Lake processors will rise to a respectable 24 MB if Intel’s Arrow Lake processors keep their eight high-performance cores. It is unknown at this time if Intel intends to increase the performance cores of Arrow Lake’s L3 cache as well. Given that Intel’s 20A (2nm-class) production process will be used to produce Arrow Lake CPUs, the business may decide to raise the size of all caches even if doing so would not have a substantial effect on die size and price. But only Intel is aware of the sensible steps to take to boost performance without materially increasing expenses.

Performance is improved by expanding the L2 cache size for high-performance cores. Improving the hit rate is one of the main advantages of expanding the cache. There will be less need to visit the slower L3 cache or main memory if the working set of a particular task fits better within the expanded L2 cache than it did previously. For workloads whose data sets may better fit into the larger L2 cache, this may result in a decrease in average memory access time and potential energy savings.

A bigger L2 cache has the drawback of possibly increasing access latency. Given that Intel’s processors already have sizable L3 caches, increasing the size of the L2 cache has a declining impact on performance. Large L2 caches may also use more power, generate more heat, and take up more space on the chip.

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