Tuesday, December 3, 2024

AMD Versal Premium Series Gen 2 With PCIe Gen6 and CXL 3.1

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AMD Versal Premium Series Gen 2: Unlocked insights and faster data flow.

In order to meet the demands of data-intensive workloads, AMD has announced the Versal Premium Series Gen 2, which enables new levels of system acceleration.

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Summary

Increase the Speed of Host Connectivity

The first adaptive SoCs and FPGAs with integrated PCIe Gen6 and CXL 3.1 allow twice as much bandwidth per lane compared to rival FPGAs.

Quickly Unlock More Memory

Hardened memory controllers that support LPDDR5X up to 8533 Mb/s, DDR5 up to 6400 Mb/s, and CXL memory expansion modules up to 64 Gb/s can help you increase the bandwidth of your external memory.

Make Data Security Stronger

With integrated PCIe Integrity and Data Encryption (IDE) support for hard IP, hard inline ECC, and external memory encryption, you can protect data both in transit and at rest.

Profit from the High-Bandwidth, Industry-Leading Host Connectivity

AMD Versal Premium Series Gen 2, the only FPGA or adaptive SoC in the industry with support for PCIe Gen6 and CXL 3.1 at 64 Gb/s in hard IP, may increase total system throughput and resource utilization to meet the demands of data-intensive applications.

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Benefits of the Product

Introducing Versal Premium Series Gen2

AMD Versal Premium Series Gen 2
Image credit to AMD

Versal Premium Series Gen 2, which extends the AMD Versal Premium Series adaptive SoC capabilities, offers new interfacing features such as an improved transceiver architecture, support for PCIe Gen6 CXL 3.1, LPDDR5X, and DDR5, and is designed to satisfy the demands of data-intensive applications of the future.

Important Features

Improved Architecture for Transceivers

Versal Premium Series Gen 2 adaptive SoCs enable high-speed data transfer speeds ranging from 1.25 Gb/s to 128 Gb/s and have a novel transceiver architecture that can operate in NRZ and PAM4 modes. Versal Premium Series Gen 2 adaptive SoCs feature PCIe Gen5 and 100G/600G Ethernet cores, as well as PCIe Gen6 (twice the bandwidth per channel above PCIe Gen5) and CXL 3.1 (a memory-coherent processor interface).

LPDDR5X and DDR5

Hard DDR memory controllers provide up to 273 GB/s of memory bandwidth by supporting DDR5 at up to 6400 Mb/s and LPDDR5X at up to 8533 Mb/s with enhanced integrated ECC and encryption features.

Features of Safety and Security

Protect data using 400G High-Speed Crypto Engines for up to 800 Gb/s of line rate encryption throughput for high bandwidth interfaces, PCIe Integrity and Data Encryption (IDE) for data in transit, and inline memory encryption integrated into specialized memory controllers for data at rest.

Ethernet Cores with FEC Multirate

Secure multi-terabit Ethernet that supports a variety of data rates and protocols is made possible by the dedicated connectivity IP. On a single platform, the combination of 100G and 600G Ethernet cores provides throughput of up to 3.1 Tb/s and enables scalability at the edge and in the cloud.

I/O & Programmable Logic

Flexibility, real-time processing, and future adaptability are offered by the Versal architecture’s programmable logic and new high-performance X5IO with support for MIPI D-PHY at up to 4.5 Gb/s and C-PHY at up to 10 Gb/s.

Chip-Based Programmable Network

In Versal adaptive SoCs, the programmable network on chip (NoC) offers an optimized multi-terabit connectivity across the various compute engines and integrated IP blocks, making timing closure easier and requiring fewer logic resources. Programming is made easier with the NoC compiler, which also lets users control latency and quality of service for important datapaths.

Industries & Applications

Gen 2 Adaptive SoCs from AMD’s Versal Premium Series for Data Center Storage Uses

Versal Premium Series Gen 2 devices are perfect for a variety of data center storage applications, such as memory pooling, encryption/compression accelerators, live migration, and custom enterprise SSDs. In order to fulfill their most memory-intensive needs, the Versal Premium Series Gen 2’s CXL 3.1 adds memory expansion and moves computational processes closer to memory.

AMD Versal Premium Series Gen 2 for Defense and Aerospace Applications with Swap-Optimized Computing

With more than 4000 DSP58 blocks in a 35×35 mm package and more than 7500 DSP58 blocks in a 3U VPX compatible package, Versal Premium Series Gen 2 expands on the tried-and-true Versal Premium Series adaptive SoCs, which offer greater I/O & GTs, more memory bandwidth, more compute density, and improved security features. All of these features are optimized for small form-factor systems.

MIPI Versal Premium Series Gen 2 C-PHY/D-PHY Test Solutions

Versal Premium Series Gen 2 supports new connectivity standards in display and camera testing with improved MIPI C-PHY/D-PHY silicon capabilities and matching CSI and DSI solutions.

Utilizing AMD Versal Premium Series Gen 2 to Meet Next-Generation Instrumentation Requirements

Significant I/O and memory bandwidth, as well as improved SerDes capabilities to accommodate upcoming standards, are necessary for next-generation testing devices. These needs are satisfied by Versal Premium Series Gen 2, which has enhanced SerDes and high-throughput PCIe and DMA capabilities.

Product Specifications

Processing System

 2VP31022VP3202  2VP34022VP3602
Application ProcessorDual-core Arm Cortex A72, 48 KB/32 KB L1 Cache w/ parity & ECC; 1 MB L2 Cache w/ ECC
Real-Time ProcessorDual-core Arm Cortex R5F, 32 KB/32 KB L1 Cache, and 256 KB TCM w/ECC
Memory256 KB On-Chip Memory w/ECC
ConnectivityEthernet (x2); UART (x2); CAN-FD (x2); USB 2.0 (x1); SPI (x2); I2C (x2)

Programmable Logic

 2VP31022VP32022VP34022VP3602
System Logic Cells1,407,5601,743,5602,561,1603,273,480
LUTs 643,456797,0561,170,8161,496,448
DSP Engines3,3324,0046,0807,616

Memory, Interface, I/O & Transceivers

 2VP31022VP32022VP34022VP3602
Total PL Memory (Mb)145178256327
Max. Memory Bandwidth (LPDDR5X)137 GB/s137 GB/s273 GB/s273 GB/s
100G Multirate Ethernet MAC2211
600G Ethernet MAC1235
400G High-Speed Crypto Engines2211
LDPC Decoder46
PCIe w/ DMA, CXL (CPM6)2 x Gen6x8/CXL 3.12 x Gen6x8/CXL 3.12 x Gen6x8/CXL 3.12 x Gen6x8/CXL 3.1
High-Performance I/O (X5IO)416416736736
GTM2 Transceivers (PL-Only – 112G,56G)8, 88, 840,056, 0
GTM2 Transceivers (CPM6/GT Direct mode – 64G/32G)16161616
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agarapuramesh
agarapurameshhttps://govindhtech.com
Agarapu Ramesh was founder of the Govindhtech and Computer Hardware enthusiast. He interested in writing Technews articles. Working as an Editor of Govindhtech for one Year and previously working as a Computer Assembling Technician in G Traders from 2018 in India. His Education Qualification MSc.
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