Thursday, July 4, 2024

TSMC Expands Packaging Capacity

The demand for advanced compute GPUs like Nvidia’s A100 and H100 has been increasing rapidly due to the growth of artificial intelligence (AI), high-performance computing (HPC), and PCs. This surge in demand has led TSMC, one of the leading chipmakers, to expand its advanced packaging capacities.

The report states that the current demand for packaging technologies, specifically chip-on-wafer-on-substrate (CoWoS), far exceeds the available capacity. To address this, TSMC(Taiwan Semiconductor Manufacturing Company) has committed to processing an additional 10,000 CoWoS wafers for Nvidia throughout 2023. Since each wafer can yield approximately 60 A100/H100 GPUs, this would mean an extra 600,000 top-end data center GPUs for Nvidia.

To meet this commitment, TSMC plans to increase its monthly output of CoWoS wafers by 1,000 to 2,000 wafers. Currently, TSMC produces around 8,000 to 9,000 CoWoS wafers per month. This increase in production will significantly enhance the utilization rate of TSMC’s high-end packaging facilities. However, it may also lead to a scarcity of CoWoS services for other industry players due to the heightened demand. Consequently, TSMC intends to expand its advanced packaging capacities.

TSMC’s decision to increase production is primarily aimed at supporting the rising demand for Nvidia’s AI chips, which are widely used across various industries. For example, Google recently launched its A3 supercomputer, based on Nvidia’s H100, boasting 26 ExaFLOPS of AI performance. Other prominent companies like Microsoft, Oracle, and Elon Musk’s upcoming AI venture have also procured tens of thousands of Nvidia’s AI GPUs in recent months.

The specific compute GPUs that Nvidia plans to ramp up production for remain unclear, as they have a range of options including A100, A30, H100, A800 (China-exclusive), and H800 (China-exclusive). All of TSMC’s facilities providing advanced packaging services are located in Taiwan.

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