Intel Unveiling the OCI Chiplet Co-packaged with CPU

Intel OCI Chiplet

In order to give the industry a glimpse into the future of high-bandwidth compute interconnect, Intel plans to showcase their cutting-edge Optical Compute Interconnect (OCI) chiplet co-packaged with a prototype of a next-generation Intel CPU running live error-free traffic at the Optical Fiber Conference in San Diego on March 26–28, 2024.

They also intend to showcase their most recent Silicon Photonics Tx and Rx ICs, which are made to enable new pluggable connectivity applications in hyperscale data centers at 1.6 Tbps.

Optical I/O as a Facilitator for AI Pervasiveness

More people are using AI-powered apps, which will drive the global economy and shape society. This trend has been accelerated by recent advances in generative AI and LLM.

The development of larger and more effective Machine Learning (ML) models will be essential to meeting the growing demands of workloads involving AI acceleration. Exponentially increasing I/O bandwidth and longer reach in connectivity are required to support larger xPU clusters and more resource-efficient architectures like memory pooling and GPU disaggregation, which are made possible by the need to dramatically scale future compute fabrics.

High bandwidth density and low power consumption are supported by electrical I/O, or copper trace connectivity, but only at very short ranges of one meter or less. While early AI clusters and modern data centers use pluggable optical transceiver modules to extend their reach, these modules come at a cost and power that cannot keep up with the demands of AI workloads, which will require exponential growth in the near future.

AI/ML infrastructure scaling requires higher bandwidths with high power efficiency, low latency, and longer reach, all of which can be supported by a co-packaged xPU (CPU, GPU, and IPU) optical I/O solution.

Optical I/O Solution Based on Intel Silicon Photonics

Based on its proprietary Silicon Photonics technology, Intel has created a 4 Tbps bidirectional fully integrated OCI chiplet to meet the massive bandwidth requirements of the AI infrastructure and facilitate future scalability. A single Silicon Photonics Integrated Circuit (PIC) with integrated lasers, an electrical IC with RF Through-Silicon-Vias (TSV), and a path to integrate a detachable/reusable optical connector are all present in this OCI chiplet or tile.

Next-generation CPU, GPU, IPU, and other System-on-a-Chip (SOC) applications with high bandwidth demands can be co-packaged with the OCI chiplet. With its first implementation, multi-Terabit optical connectivity is now possible with a reach of more than 100 meters, a <10ns (+TOF) latency, an energy efficiency of pJ/bit, and a shoreline density improvement of >4x over PCIe Gen6.

At OFC 2024 in San Diego on March 26–28 (Intel booth #1501), they intend to showcase their first-generation OCI chiplet co-packaged with a concept Intel CPU running live error-free traffic over fiber. This first OCI implementation, which is a 4 Tbps bidirectional OCI Chiplet compatible with PCIe Gen5, is realized as eight fiber pairs carrying eight DWDM wavelengths each. It supports 64 lanes of 32 Gbps data in each direction over tens of meters. Beyond this initial implementation, 32 Tbps chiplets are in line of sight for the platform.

Thanks to Intel’s unique ability to integrate DWDM laser arrays and optical amplifiers on the PIC, a single PIC in the current die-stack can support up to 8 Tbps bidirectional applications and has a complete optical sub-system, offering orders of magnitude higher reliability than conventional InP lasers. One of their high-volume fabrication facilities in the United States produces these integrated Silicon Photonics chips.

It has shipped over 8 million PICs with over 32 million on-chip lasers embedded in pluggable optical transceivers for data center networking, all with industry-leading reliability. In addition to its demonstrated dependability and improved performance, on-chip laser technology allows for true wafer-scale manufacturing, burn-in, and testing. This results in highly reliable and simple subsystems (e.g., the ELS and PIC are not connected by fibers) as well as efficient manufacturing processes.

Another unique selling point of OCI is that, unlike other technical approaches on the market, it does not require Polarization Maintaining Fiber (PMF) and can use standard, widely-deployed single-mode fiber (SMF-28). Due to the potential harm that system vibration and fiber wiggle can do to PMF’s performance and related link budget, it has not been used much.

As a crucial component enabling optical I/O technology, OCI is being developed and implemented by multiple groups within Intel. It demonstrates how Intel’s superior silicon, optical, packaging, and platform integration capabilities enable us to provide a comprehensive next-generation compute solution.

In order to enable ubiquitous AI, Intel’s field-proven Silicon Photonics technology and platform can offer the best optical connectivity options in terms of both performance and dependability.

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